Multilayer ceramic capacitor and manufacturing method of multilayer ceramic capacitor

ABSTRACT

A multilayer ceramic capacitor includes: a multilayer structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers including a co-material are alternately stacked, wherein a Mo concentration in the co-material is smaller than that in a ceramic grain in the ceramic dielectric layer.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2016-174101, filed on Sep. 6, 2016, the entire contents of which are incorporated herein by reference.

FIELD

A certain aspect of the present invention relates to a multilayer ceramic capacitor and a manufacturing method of a multilayer ceramic capacitor.

BACKGROUND

Recently, electronic devices such as smart phones or mobile phones are being downsized. Thereby, electronic components mounted on the electronic devices are rapidly being downsized. For example, in a field of multilayer ceramic electronic components of chip type represented by a multilayer ceramic capacitor, although property is secured, thicknesses of ceramic layers and internal electrodes are reduced in order to reduce a chip size.

Generally, a composition of a ceramic grain used as a co-material is the same as that of a dielectric layer (for example, see Japanese Patent Application Publications No. 2010-103198, No. 2014-067775 and No. 2014-236214.

SUMMARY OF THE INVENTION

When Mo is added to dielectric layers, life property of the dielectric layers is improved and reliability of multilayer ceramic capacitors is improved. However, Mo may influence on continuity modulus degradation of internal electrode layers. When the effect of the continuity modulus degradation of the internal electrode layers is larger than that of the life property improvement of the dielectric layers, the reliability of the multilayer ceramic capacitors may be degraded.

The present invention has a purpose of providing a multilayer ceramic capacitor and a manufacturing method of the multilayer ceramic capacitor that are capable of achieving life property of dielectric layers and high continuity modulus of internal electrode layers.

According to an aspect of the present invention, there is provided a multilayer ceramic capacitor including: a multilayer structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers including a co-material are alternately stacked, wherein a Mo concentration in the co-material is smaller than that in a ceramic grain in the ceramic dielectric layer.

According another aspect of the present invention, there is provided a manufacturing method of a multilayer ceramic capacitor including: forming a green sheet by mixing ceramic particles and Mo compounds; forming a multilayer structure by alternately stacking the green sheet and a conductive paste for forming an internal electrode including a co-material; and baking the multilayer structure, wherein an atomic concentration of Mo with respect to a main component ceramic of the ceramic particles in the green sheet is larger than an atomic concentration of Mo with respect to a main component ceramic in the co-material of the conductive paste for forming an internal electrode.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a partial perspective view of a multilayer ceramic capacitor;

FIG. 2 illustrates a continuity modulus;

FIG. 3A and FIG. 3B illustrate the number of ceramic grains;

FIG. 4 illustrates a flow of a manufacturing method of a multilayer ceramic capacitor; and

FIG. 5 illustrates measured values.

DETAILED DESCRIPTION

A description will be given of an embodiment with reference to the accompanying drawings.

Embodiment

A description will be given of a multilayer ceramic capacitor. FIG. 1 illustrates a partial perspective view of a multilayer ceramic capacitor 100. As illustrated in FIG. 1, the multilayer ceramic capacitor 100 includes a multilayer chip 10 having a rectangular parallelepiped shape, and a pair of external electrodes 20 and 30 that are respectively provided at two edge faces of the multilayer chip 10 facing each other.

The multilayer chip 10 has a structure designed to have dielectric layers 11 and internal electrode layers 12 alternately stacked. The dielectric layer 11 includes ceramic material acting as a dielectric material. End edges of the internal electrode layers 12 are alternately exposed to a first end face of the multilayer chip 10 and a second end face of the multilayer chip 10 that is different from the first end face. In the embodiment, the first face faces with the second face. The external electrode 20 is provided on the first end face. The external electrode 30 is provided on the second end face. Thus, the internal electrode layers 12 are alternately conducted to the external electrode 20 and the external electrode 30. Thus, the multilayer ceramic capacitor 100 has a structure in which a plurality of dielectric layers 11 are stacked and each two of the dielectric layers 11 sandwich the internal electrode layer 12. In the multilayer chip 10, both end faces in the stack direction of the dielectric layers 11 and the internal electrode layers 12 (hereinafter referred to as stack direction) are covered by cover layers 13. For example, a main component of the cover layer 13 is the same as that of the dielectric layer 11.

For example, the multilayer ceramic capacitor 100 may have a length of 0.2 mm, a width of 0.1 mm and a height of 0.3 mm. The multilayer ceramic capacitor 100 may have a length of 0.6 mm, a width of 0.3 mm and a height of 0.3 mm. The multilayer ceramic capacitor 100 may have a length of 1.0 mm, a width of 0.5 mm and a height of 0.5 mm. The multilayer ceramic capacitor 100 may have a length of 3.2 mm, a width of 1.6 mm and a height of 1.6 mm. The multilayer ceramic capacitor 100 may have a length of 4.5 mm, a width of 3.2 mm and a height of 2.5 mm. However, the size of the multilayer ceramic capacitor 100 is not limited.

A main component of the internal electrode layers 12 and the external electrodes 20 and 30 is a base metal such as nickel (Ni), copper (Cu), tin (Sn) or the like. The external electrodes 20 and 30 and the internal electrode layers 12 may be made of noble metal such as platinum (Pt), palladium (Pd), silver (Ag), gold (Au) or alloy thereof.

The dielectric layers 11 are mainly composed of ABO₃ (general formula) having a perovskite structure. The perovskite structure includes ABO_(3-α) having an off-stoichiometric composition. For example, the ceramic material is such as BaTiO₃ (barium titanate), CaZrO₃ (calcium zirconate), CaTiO₃ (calcium titanate), SrTiO₃ (strontium titanate), Ba_(1-x-y)Ca_(x)Sr_(y)Ti_(1-z)Zr_(z)O₃ (0≤x≤1, 0≤y≤1, 0≤z≤1) having a perovskite structure.

The dielectric layer 11 is formed by baking raw material powder of which a main component is ceramic structuring the dielectric layer 11. During the baking, the raw material powder is exposed to a reductive atmosphere. Therefore, an oxygen defect may occur in the ceramic structuring the dielectric layer 11. When Mo (Molybdenum) having a valence larger than that of a B site (four) is doped in the dielectric layer 11, Mo acts as a donor element replaced to the B site. Thus, generation of the oxygen defect is suppressed. And so, it is preferable that at least one of ceramic grains (crystal grains) of the dielectric layer 11 includes Mo. In this case, a life property of the dielectric layer 11 is improved and the reliability of the dielectric layer 11 is improved. For example, it is preferable that at least one of the ceramic grains of the dielectric layer 11 includes Mo of 0.1 atm % or more on a presumption that an amount of the B site of ABO_(3-α) that is a main component ceramic of the dielectric layer 11 is 100 atm %. The Mo concentration in the ceramic grains is a concentration of Mo (atm %) on a presumption that an amount of the B site of a main ceramic ABO_(3-α) of the ceramic grains is 100 atm %.

On the other hand, Mo may reduce a continuity modulus of the internal electrode layer 12. When influence of the reduction of the continuity modulus of the internal electrode layer 12 is larger than influence of the life property improvement of the dielectric layer 11, the reliability of the multilayer ceramic capacitor 100 may be degraded. And so, the Mo concentration in a co-material of the internal electrode layer 12 is smaller than that of the ceramic grains of the dielectric layer 11. For example, a Mo concentration in the co-material of the internal electrode layer 12 is 0.1 atm % or less. Thus, a high continuity modulus of the internal electrode layer 12 is maintained, and the life property of the dielectric layer 11 is improved. Thereby, the reliability of the multilayer ceramic capacitor 100 is improved. The Mo concentration of the co-material is a Mo concentration (atm %) on a presumption that an amount of the B site of the ABO_(3-α) that is a main component ceramic of the co-material is 100 atm %. It is preferable that the co-material of the internal electrode layer 12 does not include Mo.

For enlargement of a capacitance of the multilayer ceramic capacitor 100, reduction of the thickness of the dielectric layer 11 and enlargement of dielectric constant of the material of the dielectric layer 11 are effective. For the reduction of the thickness of the dielectric layer 11, a downsizing of the diameter of the material is effective. However, the downsizing causes reduction of the dielectric constant because of size effect. In order to solve the problem, there are many inventions relating to a composition of a dielectric body and control of a fine structure. As an example of a dopant, Mg (magnesium) is known. A function such as smoothing of a capacitance (dielectric constant) to a temperature property caused by formation of a core shell structure is known. However, the formation may cause reduction of the dielectric constant in a room temperature. When the smoothing of the temperature property is controlled by another element or the core shell structure is easily maintained by a temperature increase rate of the baking temperature, the high dielectric constant is obtained by reducing the doping amount of Mg or never doping Mg.

On the other hand, when the thickness of the internal electrode layer 12 is reduced, it is possible to increase the number of multilayer and enlarge the capacitance. However, it is not possible to maintain the high continuity modulus even if the thickness is simply reduced. And, the capacitance may be reduced because of the continuity modulus reduction. The reliability may be degraded because of defect of a ceramic layer caused by expansion in a stack direction. Therefore, it is preferable that the high continuity modulus can be maintained even if the thickness is reduced. In particular, when a ceramic material that does not include Mg and acts as a co-material is doped to the internal electrode layer 12, the continuity modulus of the internal electrode layer 12 may be reduced. This may be caused by the following reasons. The internal electrode layer 12 is spheriodized in order to minimize surface energy when the sintering progresses. A metal component of the internal electrode 12 tends to be sintered, compared to the main component ceramic of the dielectric layer 11. Therefore, when a temperature of the dielectric layer 11 is increased so that the main component ceramic is sintered, the metal component of the internal electrode layer 12 is excessively sintered and the metal component is spheriodized. In this case, when there is a defect acting a as a trigger, the internal electrode layer 12 is broken from the defect and the continuity modulus is reduced.

FIG. 2 illustrates the continuity modulus. As illustrated in FIG. 2, in an observed region having a length of L0 in the internal electrode layer 12, the lengths of the metal portions of L1, L2, . . . to Ln are measured and summed. A ratio of the metal component ΣLn/L0 is defined as the continuity modulus of a layer.

And so, it is preferable that the Mg concentration in the ceramic grain that is included in the dielectric layer 11 and contacts to the internal electrode layer 12 is smaller than that in the co-material included in the internal electrode layer 12. Here, the Mg concentration in the ceramic grain is a Mg concentration (atm %) on a presumption that an amount of the main component ceramic in the ceramic grain is 100 atm %. The Mg concentration in the co-material is Mg concentration (atm %) on a presumption that an amount of the main component ceramic in the co-material is 100 atm %. For example, when the main component ceramic is barium titanate, the Mg concentration is a concentration of Mg (atm %) on a presumption that a amount of barium titanate is 100 atm %. When a plurality of co-materials are spaced from each other in the internal electrode layer 12, the Mg concentration of the ceramic grain that is included in the dielectric layer 11 and contacts to the internal electrode layer 12 is smaller than that in at least one of the co-materials included in the internal electrode layer 12. Alternatively, when a plurality of co-materials are spaced from each other in the internal electrode layer 12, the Mg concentration in the co-material may be an average of the Mg concentration in the plurality of co-materials.

As illustrated in FIG. 3A, when the number of the ceramic grain 14 is one or two in at least one of regions of the dielectric layer 11 in the stack direction of the dielectric layer 11 and the internal electrode layer 12, it is preferable that the Mg concentration in the one or two ceramic grains 14 in the dielectric layer 11 is smaller than that in the co-material 15 included in the internal electrode layer 12. In this case, it is possible to suppress the influence of Mg in the dielectric layer 11. And it is possible to achieve the effect of Mg in the internal electrode layer 12. That is, it is possible to achieve both the high continuity modulus of the internal electrode layer 12 and the high dielectric constant of the dielectric layer 11.

As illustrated in FIG. 3B, when the number of the ceramic grains 14 continuing in series in at least any one of positions in the dielectric layer 11 in the stack direction of the dielectric layer 11 and the internal electrode layer 12 is three or more, it is preferable that the Mg concentration in the one of the ceramic grains 14 contacting to the internal electrode layer 12 is smaller than that of a co-material 15 in the internal electrode layer 12. Moreover, it is preferable that the Mg concentration of one or more of the ceramic grains 14 not contacting to the internal electrode layer 12 is smaller than that of the ceramic grain 14 contacting to the internal electrode layer 12. In this case, the Mg concentration in the whole of the dielectric layer 11 is reduced. It is therefore possible to suppress the influence of Mg in the dielectric layer 11. And it is possible to achieve the effect of Mg in the internal electrode layer 12. That is, it is possible to achieve the high continuity modulus of the internal electrode layer 12 and the high dielectric constant of the dielectric layer 11.

When the Mg concentration in the co-material 15 of the internal electrode layer 12 is excessively small, the internal electrode layer 12 may miss the high continuity modulus. And so, it is preferable that the Mg concentration in the co-material 15 of the internal electrode layer 12 has a lower limit. On the other hand, when the Mg concentration in the co-material 15 of the internal electrode layer 12 is excessively high, oxides of a metal included in the internal electrode layer 12 may excessively diffuse. Therefore, the lifetime of the internal electrode layer 12 may be degraded. And so, it is preferable that the Mg concentration in the co-material 15 of the internal electrode layer 12 has an upper limit. In concrete, it is preferable that the Mg concentration in the co-material 15 of the internal electrode 12 is 0.3 atm % or more and less than 1.5 atm %. When a plurality of co-materials in the internal electrode layer 12 are spaced from each other, the Mg concentration in at least one of co-materials included in the internal electrode layer 12 may be 0.3 atm % or more and less than 1.5 atm %. Alternatively, an average of the Mg concentrations of the plurality of co-materials may be 0.3 atm % or more and less than 1.5 atm %.

When the Mg concentration in the ceramic grain 14 that is included in the dielectric layer 11 and contacts to the internal electrode layer 12 is excessively high, the dielectric layer may miss the high dielectric constant. And so, it is preferable that the Mg concentration in at least one of the ceramic grains 14 contacting to the internal electrode layer 12 has an upper limit. In concrete, it is preferable that the Mg concentration in at least one of the ceramic grains 14 contacting to the internal electrode 12 is 0.7 atm % or less. Alternatively, an average of the Mg concentrations of a plurality of ceramic grains 14 contacting to the internal electrode layer 12 is 0.7 atm % or less.

Next, a description will be given of a manufacturing method of the multilayer ceramic capacitor 100. FIG. 4 illustrates a manufacturing method of the multilayer ceramic capacitor 100.

[Making Process of Raw Material Powder]

As illustrated in FIG. 4, raw material powder for forming the dielectric layer 11 is prepared. Generally, an A site element and a B site element are included in the dielectric layer 11 in a sintered phase of grains of BaTiO₃. BaTiO₃ is tetragonal compound having a perovskite structure and has a high dielectric constant. Generally, BaTiO₃ is obtained by reacting a titanium material such as titanium dioxide with a barium material such as barium carbonate and synthesizing barium titanate. Various methods can be used as a synthesizing method of the ceramic structuring the dielectric layer 11. For example, a solid-phase method, a sol-gel method, a hydrothermal method or the like can be used. The embodiment may use any of these methods.

Mo compound such as MoO₃ is added to the resulting ceramic powder. Additive compound may be added to the ceramic powder, in accordance with purposes. The additive compound may be an oxide of Mn (manganese), V (vanadium), Cr (chromium) or a rare earth element (Y (yttrium), Dy (dysprosium), Tm (thulium), Ho (holmium), Tb (terbium), Yb (ytterbium), Sm (samarium), Eu (europium), Gd (gadolinium) and Er (erbium)), or an oxide of Co (cobalt), Ni, Li (lithium), B (boron), Na (sodium), K (potassium) and Si, or glass.

In the embodiment, it is preferable that ceramic particles structuring the dielectric layer 11 are mixed with compound including additives and are calcined in a temperature range from 820 degrees C. to 1150 degrees C. Next, the resulting ceramic particles are wet-blended with additives, are dried and crushed. Thus, ceramic powder is obtained. For example, it is preferable that an average grain diameter of the resulting ceramic particles used for manufacturing the multilayer ceramic capacitor 100 is 50 nm to 150 nm from a viewpoint of thickness reduction of the dielectric layer 11. The grain diameter may be adjusted by crushing the resulting ceramic powder as needed. Alternatively, the grain diameter of the resulting ceramic power may be adjusted by combining the crushing and classifying.

[Stacking Process]

Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer such as dioctyl phthalate (DOP) are added to the resulting ceramic powder and wet-blended. With use of the resulting slurry, a strip-shaped dielectric green sheet with a thickness of 0.8 μm or less is coated on a base material by, for example, a die coater method or a doctor blade method, and then dried.

Then, a pattern of the internal electrode layer 12 is provided on the surface of the dielectric green sheet by printing a conductive paste for forming an internal electrode with use of screen printing or gravure printing. The conductive paste includes an organic binder. A plurality of patterns are alternatively exposed to the pair of external electrodes. As co-materials, ceramic particles are added to the conductive paste. A main component of the ceramic particles is not limited. However, it is preferable that the main component of the ceramic particles is the same as that of the dielectric layer 11. For example, BaTiO₃ of which an average particle sire is 50 nm or less is evenly dispersed. It is preferable that the co-materials include Mg.

Then, the dielectric green sheet on which the internal electrode layer pattern is printed is stamped into a predetermined size, and a predetermined number (for example, 100 to 500) of stamped dielectric green sheets are stacked while the base material is peeled so that the internal electrode layers 12 and the dielectric layers 11 are alternated with each other and the end edges of the internal electrode layers 12 are alternately exposed to both end faces in the length direction of the dielectric layer so as to be alternately led out to a pair of external electrodes of different polarizations. Cover sheets, which are to be the cover layers 13, are stacked on the stacked green sheets and under the stacked sheets. The resulting compact is cut into a predetermined size (for example, 1.0 mm×0.5 mm). After that, conductive pastes to be the external electrodes 20 and 30 are coated on the both edge faces of the cut multilayer structure and are dried. Thus, a ceramic multilayer structure having a rectangular parallelepiped shape is obtained.

[Baking Process]

The binder is removed from the resulting ceramic multilayer structure in N₂ atmosphere of a temperature range of 250 degrees C. to 500 degrees C. After that, the resulting ceramic multilayer structure is baked for ten minutes to 2 hours in a reductive atmosphere in a temperature range of 1100 degrees C. to 1300 degrees C. Thus, each compound of the dielectric green sheet is sintered and grown into grains. In this manner, it is possible to manufacture the multilayer ceramic capacitor 100 that has the multilayer chip 10 having the multilayer structure in which the sintered dielectric layers 11 and the sintered internal electrode layers 12 are alternately stacked and has the cover layers 13 formed as outermost layers of the multilayer chip 10 in the stack direction.

In the baking process, Mo does not diffuse to the conductive paste for forming an internal electrode, in the process in which each compound included in the dielectric green sheet is sintered and the process in which the conductive paste for forming an internal electrode is sintered. On the other hand, when the co-materials include Mg, a part of the co-materials may be moved to the dielectric green sheet and Mg from the co-material may diffuse into the dielectric green sheet, in the processes. In this case, after the baking process, Mg in the co-materials 15 of the internal electrode layer 12 remains in the co-material 15. On the other hand, another Mg may be included in the ceramic grain 14 contacting to the internal electrode layer 12.

[Re-Oxidizing Process]

After that, a re-oxidizing process may be performed in N₂ gas atmosphere in a temperature range of 600 degrees C. to 1000 degrees C.

In another embodiment of the manufacturing method of the multilayer ceramic capacitor, the external electrodes 20 and 30 may be baked separately from the dielectric layer 11. For example, after baking a multilayer structure in which a plurality of dielectric layers 11 are stacked, conductive pastes may be formed on both edge faces by baking and the external electrodes 20 and 30 may be formed. Alternatively, the external electrodes may be formed thickly on the both edge faces of the multilayer structure by a sputtering method.

With the manufacturing method in accordance with the embodiment, the Mo concentration in the co-material 15 of the internal electrode layer 12 is smaller than that in the ceramic grain 14 of the dielectric layer 11. Thus, the life property of the dielectric layer 11 is improved and the reliability of the dielectric layer 11 is improved. On the other hand, it is possible to maintain the high continuity modulus of the internal electrode layer 12. That is, it is possible to achieve both the life property of the dielectric layer 11 and high continuity modulus of the internal electrode layer 12.

When the co-material including Mg is added to the conductive paste for forming an internal electrode layer and Mg is not added to the dielectric green sheet for forming the dielectric layer 11, the Mg concentration in the ceramic grain 14 that is included in the dielectric layer 11 and contacts to the internal electrode layer 12 can be smaller than that in at least one of co-materials of the internal electrode layer 12, after the baking process. Alternatively, the Mg concentration (atm %) of a main component ceramic in ceramic particles of the dielectric green sheet may be smaller than that in a main component ceramic of the co-material of the conductive paste for forming an internal electrode. In this case, the Mg concentration in the ceramic grain 14 that is included in the dielectric layer 11 and contacts to the internal electrode layer 12 can be smaller than that in at least one of co-materials of the internal electrode layer 12.

When the number of the ceramic grains 14 of the dielectric layer 11 in the stack direction of the dielectric layer 11 and the internal electrode layer 12 is one or two, the Mg concentration of the one or two ceramic grains 14 in the dielectric layer 11 can be smaller than the Mg concentration in the co-material 15 included in the internal electrode layer 12. When the number of the ceramic grains 14 continuing in series in the stack direction of the dielectric layer 11 and the internal electrode layer 12 is three or more, the Mg concentration in one or more of the ceramic grains 14 contacting to the internal electrode layer 12 can be smaller than that of the co-material 15 included in the internal electrode layer 12. Moreover, the Mg concentration in one or more of the ceramic grains 14 not contacting to the internal electrode layer 12 can be smaller than that of the ceramic grain 14 contacting to the internal electrode layer 12. In this case, it is possible to suppress the influence of Mg in the dielectric layer 11 and achieve the effect of Mg in the internal electrode layer 12. That is, it is possible to achieve both the high continuity modulus of the internal electrode layer 12 and the high dielectric constant of the dielectric layer 11.

EXAMPLES

The multilayer ceramic capacitors in accordance with the embodiment were made and the property was measured.

Examples 1 to 8

[Making of Dielectric Material]

Ho₂O₃, MnCO₃, V₂O₅ and SiO₂ were weighed so that a concentration of Ho was 0.4 atm %, a concentration of Mn was 0.2 atm %, a concentration of V was 0.1 atm % and a concentration of Si was 0.6 atm % on a presumption that an amount of Ti of barium titanate powder (an average particle diameter was 0.15 μm) was 100 atm %. And the materials were sufficiently wet-blended by a ball mill and were crushed. Thereby, a dielectric material was obtained. In examples 1 to 4, 6 and 7, MoO₃ was added to the dielectric material so that a concentration of Mo was 0.2 atm %. In an example 5, MoO₃ was added to the dielectric material so that a concentration of Mo was 0.1 atm %. In an example 8, MoO₃ was added to the dielectric material so that a concentration of Mo was 0.3 atm %. In an example 4, MgO was added to the dielectric material so that a concentration of Mg was 0.7 atm %. In the examples 1 to 3 and 5 to 8, Mg was not added to the dielectric material.

[Making of Conductive Paste for Forming an Internal Electrode]

Ho₂O₃, MnCO₃, V₂O₅, and SiO₂ were weighed so that a concentration of Ho was 0.5 atm %, a concentration of Mn was 0.1 atm %, a concentration of V was 0.1 atm % and a concentration of Si was 0.2 atm % on a presumption that an amount of Ti of barium titanate powder (an average particle diameter is 0.05 μm) was 100 atm %. And the materials were sufficiently wet-blended by a ball mill and were crushed. Thereby, co-material was obtained. In the example 2, MoO₃ was added to the co-material so that a concentration of Mo was 0.1 atm %. And the resulting materials were wet-blended and were crushed. In the example 7, MoO₃ was added to the co-material so that a concentration of Mo was 0.05 atm %. And the resulting material were wet-blended and were crushed. In the examples 1, 3, 4 to 6 and 8, Mo was not added to the co-material. In the examples, 1, 2, 4, 5, 7 and 8, MgO was added to the co-material so that a concentration of Mg was 0.7 atm %. And the resulting materials were wet-blended and were crushed. In the example 6, MgO was added to the co-material so that a concentration of Mg was 0.3 atm %. And the resulting materials were wet-blended and were crushed. In the example 3, MgO was not added to the co-material.

Next, the resulting co-material of 20 weight parts was added to Ni metal powders of 100 weight parts whose diameter was 0.2 μm. Moreover, ethyl cellulose and α terpineol were added. The resulting material was kneaded by three rollers. And the conductive paste for forming an internal electrode was obtained.

[Making of a Multilayer Ceramic Capacitor]

Butyral acting as an organic binder, and toluene and ethyl alcohol acting as a solvent were added to the dielectric material. A dielectric green sheet of 1.2 μm was formed by a doctor blade method. A conductive paste for forming an internal electrode was screen-printed on the resulting dielectric sheet. 250 numbers of sheets on which the conductive paste for forming an internal electrode were stacked. Cover sheets having a thickness of 30 μm were stacked on a lower face and an upper face of the stacked sheets. After that, a multilayer structure was obtained by a thermo compression bonding. And the resulting multilayer structure was cut into a predetermined shape. Ni external electrodes were formed on the resulting multilayer structure by a dip method. After removing the binder in a N₂ atmosphere, the resulting multilayer structure was baked at 1250 degrees C. in a reductive atmosphere (O₂ partial pressure: 10⁻⁵ to 10⁻⁸ atm). And sintered multilayer structure was formed. A length was 0.6 mm. A width was 0.3 mm. A height was 0.3 mm. The sintered multilayer structure was re-oxidized in a N₂ atmosphere at 800 degrees C. After that, metals of Cu, Ni and Sn were coated on a surface of external electrode terminals by plating. And, a multilayer ceramic capacitor was formed. After baking, the thickness of the internal electrode layers 12 was 1.0 μm.

Comparative Examples 1 and 2

In a comparative example 1, Mo was added to neither the dielectric material nor the co-material. Mg was not added to the dielectric material. However, MgO was added to the co-material so that a concentration of Mg was 1.5 atm %. In a comparative example 2, neither Mg nor Mo was added to the dielectric material. Neither Mg nor Mo wad added to the co-material. The other conditions of the comparative examples 1 and 2 were the same as those of the examples 1 to 4.

[Analysis]

A capacitance obtaining rate and HALT (Highly Accelerated Limit Test) defect rate of the multilayer ceramic capacitors were measured.

[Capacitance Obtaining Rate]

A capacitance was measured by an LCR meter. Measured values were compared with a design value that was calculated from a dielectric constant of a dielectric material (a dielectric constant was calculated by making a disc-shaped sintered material having a size of ϕ10 mm×T=1 mm from only a dielectric material in advance and measuring a capacitance), a crossing area of internal electrodes, a thickness of a dielectric ceramic layer and stack number. When a capacitance obtaining rate (measured value/design value×100) was 91% to 105%, it was determined as acceptance (circle). When the capacitance obtaining rate was 90% or less, it was determined as triangle.

[HALT Defect Rate]

HALT tests of 125 degrees C.—12 Vdc—120 min—100 numbers were performed. Samples whose short defect rate was less than 10% were determined as acceptance (circle). Samples whose short defect rate was less than 20% were determined as (triangle). Samples whose short defect rate was 20% or more were determined as not acceptance (cross).

FIG. 5 illustrates the measured results. The HALT defect rate was less than 20% in the examples 1 to 8. This is because the Mo concentration in the co-material 15 of the internal electrode layer 12 was smaller than that of the ceramic grain 14 of the dielectric layer 11, the life property of the dielectric layer 11 was improved, the reliability of the dielectric layer 11 was improved and the high continuity modulus of the internal electrode layer 12 was remained.

In the examples 1, 2 and 5 to 8, the capacitance obtaining rate was 91% or more. This is because the Mg concentration in the ceramic grain 14 that was included in the dielectric layer 11 and contacted to the internal electrode layer 12 was smaller than that in the co-material 15 of the internal electrode layer 12, the influence of Mg was suppressed in the dielectric layer 11, and the effect of Mg was achieved in the internal electrode layer 12.

In the comparative examples 1 and 2, the HALT defect rate was 20% or more. This is because Mo was not added to the dielectric layer 11 and the life property of the dielectric layer was not improved.

Although the embodiments of the present invention have been described in detail, it is to be understood that the various change, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention. 

What is claimed is:
 1. A multilayer ceramic capacitor comprising: a multilayer structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers including a co-material are alternately stacked, wherein a Mo concentration in the co-material is smaller than that in a ceramic grain in the ceramic dielectric layer, wherein a Mg concentration in the ceramic grain is smaller than that in the co-material.
 2. The multilayer ceramic capacitor as claimed in claim 1, wherein a Mo concentration in a main component ceramic in the ceramic grain is 0.2 atm % or more.
 3. The multilayer ceramic capacitor as claimed in claim 1, wherein the co-material does not include Mo.
 4. The multilayer ceramic capacitor as claimed in claim 2, wherein the co-material does not include Mo.
 5. The multilayer ceramic capacitor as claimed in claim 1, wherein a main component of the ceramic grain and the co-material is barium titanate.
 6. The multilayer ceramic capacitor as claimed in claim 1, wherein a main component of the internal electrode layer is Ni.
 7. A manufacturing method of a multilayer ceramic capacitor comprising: forming a green sheet by mixing ceramic particles and Mo compounds; forming a multilayer structure by alternately stacking the green sheet and a conductive paste for forming an internal electrode including a co-material; and baking the multilayer structure, wherein an atomic concentration of Mo with respect to a main component ceramic of the ceramic particles in the green sheet is larger than an atomic concentration of Mo with respect to a main component ceramic in the co-material of the conductive paste for forming an internal electrode, wherein an atomic concentration of Mg with respect to the main component ceramic in the co-material is larger than an atomic concentration of Mg with respect to the main component ceramic of the ceramic particles.
 8. The method as claimed in claim 7, wherein the atomic concentration of Mo with respect to the main component ceramic of the ceramic particles of the green sheet is 0.2 atm % or more.
 9. The method as claimed in claim 7, wherein the co-material does not include Mo.
 10. The method as claimed in claim 8, wherein the co-material does not include Mo.
 11. The method as claimed in claim 7, wherein a main component of the ceramic particles and the co-material is barium titanate.
 12. The method as claimed in claim 7, wherein a main component of the conductive paste for forming an internal electrode is Ni.
 13. The multilayer ceramic capacitor as claimed in claim 1, wherein a Mg concentration in a ceramic grain contacting one of the plurality of internal electrode layers is smaller than that in the co-material in the one of the plurality of internal electrode layers.
 14. The method as claimed in claim 7, wherein: the baking is performed so that a dielectric ceramic layer is formed from the green sheet and an internal electrode layer is formed from the conductive paste; and the baking is performed so that a Mg concentration in a ceramic grain contacting the internal electrode layer is smaller than in the co-material. 